Alpha and Omega Semiconductor (AOS) has launched its AmpStack packaging technology – a vertical-stack architecture that integrates both high-side and low-side MOSFETs of a half-bridge into a single DFN6x5 package. The first production device, AOPL66801, targets AI data center power, motor drives, and power tools.

Traditional half-bridge designs use two discrete DFN5x6 MOSFETs side-by-side, with PCB copper traces connecting the switch node – creating parasitic inductance, voltage ringing, increased switching losses, and consuming significant board space.

AmpStack eliminates external routing with a vertical chip stack and direct clip connection to the switch node – cutting parasitic inductance, suppressing ringing, and fitting a complete half-bridge into the footprint of a single DFN5x6.

The AOPL66801 is an 80V N-channel symmetric half-bridge MOSFET with both high-side and low-side RDS(on) of 2.2mΩ at 10V gate drive. Continuous drain current reaches 304A (high-side) and 215A (low-side) , supporting high-power applications. Kelvin source pins stabilize gate drive under fast transients, while a 175°C junction temperature rating ensures reliability in high-current, high-density environments.

AmpStack is a platform – not a one-off product – with more voltages and configurations to follow. As AI server racks demand higher current and smaller footprints, advanced stacked packaging is becoming the primary lever for power density improvement over silicon process scaling alone.

From ICgoodFind: Two chips, one package, half the board space – and less ringing. AOS just showed that packaging innovation can beat process scaling in power delivery – and that's exactly what AI racks need right now.